TY  - JOUR
AU  - Rao, M V Ganeswara
AU  - Kumar , P Ravi 
AU  - Balaji, T 
TI  - A High Performance Dual Stage Face Detection Algorithm Implementation using FPGA Chip and DSP Processor
JO  - Journal of Information Systems and Telecommunication (JIST) 
VL  - 10
IS  - 40
SP  - 241
EP  - 248
PY  - 2022
DO  - 10.52547/jist.31803.10.40.241
ER  -